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Phase 2 of the combined DroneCAN driver rework (folds in iNavFlight#11560 content):
F7 bxCAN ISR-driven TX refill:
- Add NVIC_PRIO_CAN=4 to nvic.h (shared by H7 and F7)
- Enable CAN_IT_TX_MAILBOX_EMPTY and CAN1_TX_IRQn at NVIC_PRIO_CAN
- Add HAL_CAN_TxMailbox{0,1,2}CompleteCallback ISR pumps in dronecan.c
- Wire dronecanMaskTxISR/UnmaskTxISR to NVIC_DisableIRQ/EnableIRQ(CAN1_TX_IRQn)
- Add #else branch for SITL/AT32 (was missing, would break SITL build)
TEC/REC/LEC error counters:
- Extend canardProtocolStatus_t with tec, rec, lec fields
- F7: populate from ESR register (bits 23:16, 31:24, 6:4)
- H7: populate from ECR register (bits 22:16, 14:8) + PSR.LastErrorCode
Typo fix: canardSTM32Recieve -> canardSTM32Receive across all drivers and call sites
Other:
- Add canardSTM32GetTxQueueFillLevel() to all three drivers (returns 0; no SW queue)
- Make canard and memory_pool static in dronecan.c
- Add cliDronecan CLI command showing bus health (BusOff, ErrorPassive, TEC, REC, LEC, fill levels)
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