vivado_hls

Source codes for High Level Synthesis for Fixed Progammable Gate Arrays (FPGAs). Can be converted to RTL using Vivado HLS or SDSoC.

What's been implemented?

1. Finding the histogram of an image
2. Histogram stretching
3. Histogram equalization
4. Anisotropic diffusion (optimized for hardware)
5. Simple 2D convolution using an inbuilt HLS function
6. Simple 2D convolution using handwritten code