- 🔭 I'm currently working as a Design Verification Engineer in the semiconductor industry
- 🌱 I'm currently learning about SVA, UVM, LPV and AI in Design Verification
- 📫 You can reach out to me on LinkedIn
- ⚡ Fun fact: I usually tend to move to a different city after spending 9 years there
- Languages: SystemVerilog, Python, Verilog, C++, C
- Frameworks: UVM, PyTorch, TensorFlow, OpenCV
- Tools/Platforms: Vmanager, Simvision, JasperGold, Verisium Debug, MATLAB, Audacity, Vivado-Xilinx
- Protocols: SPI, I2C, CAN, TPL, JTAG, UART
- Technical Proficiency: Design Verification, Signal Processing, Machine Learning, Digital Design, Internet of Things


