enable psram on emery/gabbro - #1602
Conversation
Signed-off-by: snek <the@snek.dev>
gmarull
left a comment
There was a problem hiding this comment.
We're not going to enable PSRAM just for the sake of enabling it. As of today, it has no usage on the system, and yet it consumes some power by just being on.
|
@gmarull I would have been happy to discuss other approaches as well, for example only enabling psram if an app requests it. I don't think just closing a PR like this is a very appropriate behavior for a project seeking open source contributions. |
Happy to discuss as soon as the proposal comes with context, example usecases, etc. Features reaching userspace have wide implications. |
…see if it responds + if CR0 write landed Research (datasheet + GitHub forks) reframed the wall: the Winbond HyperBus bring-up is UNIMPLEMENTED everywhere (stub in 7 repos; PebbleOS powers PSRAM off; PR coredevices#1602 QEMU-only). HAL_HYPER_PSRAM_Init has 3 defects: cal runs before DCR.HYPER is set (OPI framing), CR0 latency written after cal, no HyperBus reset. -75 showed re-cal after HYPER+CR0 still fails, so before rewriting the init, read ID0/ID1/CR0/CR1 back over HyperBus (HAL_HYPER_PSRAM_ReadID/ReadCR, bounded TCF spin so no hang) to learn: does the device respond in HyperBus framing, and did the CR0 write (expect 0x178f @144mhz) land? Diagnostic only. Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
only tested on emulator so far (coredevices/qemu#6). hardware init is mostly copy/paste from sifli.